NPF LA-1 Interface Specification Compatible with QDR SRAM
QDR SRAM is the Industry Standard SRAM
for Next-Generation
OC-48, OC-192 and OC-768 Applications
SAN JOSE, Calif., July 15, 2002 – The
QDR™ SRAM co-development team today announced the Network
Processing Forum (NPF) has adopted key elements of the Quad
Data Rate™ (QDR™) interface as the standard for
Phase 1 of the Look–Aside Interface (LA-1). The LA-1
specification passed the NPF’s Principal Member Ballot
on May 24, 2002. QDR SRAM is a high-performance communications
memory standard for network switches, routers, and other communications
applications.
The NPF was organized to facilitate and accelerate the development
of next-generation networking and telecommunications products
based on network processing technologies. The LA-1 Interface
is designed to offload certain tasks from the Network Processing
Unit (NPU) and is targeted primarily, though not exclusively,
at memory-based lookup coprocessors. QDR SRAM is one of the
high-performance technologies on which LA-1 is based.
“One of our goals is to utilize, as much as possible,
existing technologies,” said Misha Nossik, Chairman
of the NPF Board of Directors. “Basing NPF implementation
agreements on a proven technology helps reduce implementation
risk while maximizing flexibility for end customers and NPE
vendors.”
“QDR’s adoption, innovation, and market growth
continues to make the QDR SRAM family of products the high
performance memory of choice in the networking market. We
feel this standard will be beneficial to both our networking
customers and integrators,” said Mario Martinez, director
of Strategic Marketing for Cypress’s Memory Products
Division. “The QDR SRAM Co-Development team continues
to gain momentum in the networking marketplace with QDRII,
its next-generation family of products.”
Many companies developing and using memory devices are currently
using the QDR SRAM standard. Since most leading memory vendors
participated in the LA-1 specification development, users
can be confident that the LA-1 specification meets real-world
needs.
The QDR SRAM Co-Development Team is collaborating to define
proprietary networking SRAM architectures. The leading team
members include Cypress, Micron, IDT, NEC, and Samsung. Hitachi
has signed a letter of intent to join the QDR SRAM Co-Development
Team.
About QDR
In 1999, the QDR SRAM Co-Development Team was created to define
a new family of SRAM architectures for high-performance communications
applications. Participating companies work closely together
to ensure multiple sources for the new QDR SRAMs by developing
pin- and function-compatible products. The QDR family of SRAM
products incorporates extensive input from networking industry
leaders. QDR SRAM devices have two ports running independently
at twice the rate of conventional synchronous memories, resulting
in four data items per clock cycle. The QDR SRAM family of
products includes Quad Data Rate and Double Data Rate common
and separate I/O definitions. Depending on the application,
products in the QDR SRAM family can more than double SRAM
device efficiency per pin.
For more information on the NPF, please visit www.npforum.org
Quad Data Rate™ SRAM and QDR™ SRAM comprise a
new family of products developed by Cypress, IDT, Micron Technology,
Inc., NEC, and Samsung. Hitachi has signed a letter of intent
to join the QDR co-development team and is currently finalizing
a formal agreement with the other QDR team members. Any other
trademarks referenced herein are the property of their respective
owners.
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