QDR™ stands for Quad Data Rate. QDR SRAMs operate by allowing two ports to run independently at Double Data Rate thereby enabling four data items to be transferred per clock cycle, hence Quad Data Rate.

QDR SRAMs target the next generation data and networking equipment that operates at data rates above 200MHz. The new SRAMs are ideally suited for high-bandwidth applications where they will serve as the main memory for look-up tables, linked lists, measurement statistics, packet flow, scheduling and controller buffer memory.

QDR SRAMs enable the system designer to maximize bandwidth by allowing operation at data rates above 200 MHz. The QDR architecture allows the designer to reach these speeds without the possibility of bus contention occurring. QDR SRAMs are optimzed to support applications that are required to perfom random memory accesses for performing read/write functions.

QDR SRAMs do not require a common bus to be turned around because there are separate data buses for reads and writes. QDR SRAMs also differ from current architectures by utilizing a unique type of double data rate (DDR) architecture on two ports (hence "Quad Data Rate") to increase system bandwidth.

All members of the co-development team have cross-licenses to any and all patents relating to QDR. In addition, each company has applied for all viable patents.

Cypress Semiconductor Corporation, and Renesas Electronics have formed the consortium to mutually define, develop and deliver the next-generation SRAM standard for the high-speed networking market. The companies are working to ensure that customers will have multiple high-quality sources for the new SRAMs by developing pin- and functionally compatible
products.

The collective system expertise of the team members provide our customers with a wide range of experience in state of the art high-speed SRAM design. The mutual definition of products allows for complete interoperability and true second sourcing of products.

The consortium focuses on product definition and development. Each company is independently designing QDR devices and the competitive nature of the multiple companies in the business arena will remain. Our customers will benefit from having multiple competitors developing products to a common specification.

Package and pinout will be offered as a JEDEC standard.

Each team member will design and manufacture the devices in its own technology and fabrication facilities and will deliver products according to its own internal development schedules. For more information on schedules please visit the following links:
1. Cypress QDR products,
2. Renesas QDR products.