In 1999, the QDR SRAM Co-Development Team was created to define a new family of SRAM architectures
for high-performance communications applications. Participating companies work closely together to ensure multiple sources for the new QDR SRAMs by developing pin- and function-compatible products. The QDR family of SRAM & products incorporates extensive input from networking industry leaders. QDR SRAM devices have two ports running independently at twice the rate of conventional synchronous memories, resulting in four data items per clock cycle. The QDR SRAM family of products includes Quad Data Rate and Double
Data Rate common and separate I/O definitions. Depending on the application, products in the QDR SRAM family can more than double SRAM device efficiency per pin.
VISION &
MISSION
Vision:
Continue to be the memory standard of choice for high-performance networking and communication applications with availability from multiple sources
Mission:
Create a forum where vendors, partners and customers jointly define, regulate, and evangelize the QDR standard and roadmap